Indirect Registers

class uvm.reg.uvm_reg_indirect.UVMRegIndirectData(name='uvm_reg_indirect', n_bits=0, has_cover=False)[source]

Bases: UVMReg

build()[source]
configure(idx, reg_a, blk_parent, regfile_parent=None)[source]

Function: configure Configure the indirect data register.

The idx register specifies the index, in the reg_a register array, of the register to access. The idx must be written to first. A read or write operation to this register will subsequently read or write the indexed register in the register array.

The number of bits in each register in the register array must be equal to n_bits of this register.

See <uvm_reg::configure()> for the remaining arguments.

function void configure (uvm_reg idx,

uvm_reg reg_a[], uvm_reg_block blk_parent, uvm_reg_file regfile_parent = None)

Parameters
  • idx

  • reg_a

  • blk_parent

  • regfile_parent

add_map(_map)[source]

/local/ virtual function void add_map(uvm_reg_map map)

Parameters

_map

add_frontdoors(_map)[source]

local function void add_frontdoors(uvm_reg_map map)

Parameters

_map

do_predict(rw, kind=0, be=-1)[source]
virtual function void do_predict (uvm_reg_item rw,

uvm_predict_e kind = UVM_PREDICT_DIRECT, uvm_reg_byte_en_t be = -1)

Parameters
  • rw

  • kind

  • UVM_PREDICT_DIRECT

  • be

get_local_map(_map, caller='')[source]

virtual function uvm_reg_map get_local_map(uvm_reg_map map, string caller=””)

Parameters
  • _map

  • caller

Returns:

add_field(field)[source]

Just for good measure, to catch and short-circuit non-sensical uses

virtual function void add_field (uvm_reg_field field)

Parameters

field

needs_update()[source]

Function: needs_update

Returns 1 if any of the fields need updating

See <uvm_reg_field::needs_update()> for details. Use the UVMReg.update to actually update the DUT register.

Returns:

async write(status, value, path=3, _map=None, parent=None, prior=-1, extension=None, fname='', lineno=0)[source]
virtual task write(output uvm_status_e status,

input uvm_reg_data_t value, input uvm_path_e path = UVM_DEFAULT_PATH, input uvm_reg_map map = None, input uvm_sequence_base parent = None, input int prior = -1, input uvm_object extension = None, input string fname = “”, input int lineno = 0)

Parameters
  • status

  • value

  • path

  • UVM_DEFAULT_PATH

  • _map

  • parent

  • prior

  • extension

  • fname

  • lineno

class uvm.reg.uvm_reg_indirect.uvm_reg_indirect_ftdr_seq(addr_reg, idx, data_reg)[source]

Bases: UVMRegFrontdoor

async body()[source]

Body of indirect sequence