Blocks

class uvm.reg.uvm_reg_block.UVMRegBlock(name='', has_coverage=0)

Bases: UVMObject

Block abstraction base class

A block represents a design hierarchy. It can contain registers, register files, memories and sub-blocks.

A block has one or more address maps, each corresponding to a physical interface on the block.

m_roots: Dict[UVMRegBlock, int] = {}

id = 0

configure(parent=None, hdl_path='') → None

Instance-specific configuration

Specify the parent block of this block. A block without parent is a root block.

If the block file corresponds to a hierarchical RTL structure, its contribution to the HDL path is specified as the ~hdl_path~. Otherwise, the block does not correspond to a hierarchical RTL structure (e.g. it is physically flattened) and does not contribute to the hierarchical HDL path of any contained registers or memories.

create_map(name: str, base_addr: int, n_bytes: int, endian: int, byte_addressing=True) → Optional[UVMRegMap]

Function: create_map

Create an address map in this block

Create an address map with the specified ~name~, then configures it with the following properties.

base_addr - the base address for the map. All registers, memories,

and sub-blocks within the map will be at offsets to this address

n_bytes - the byte-width of the bus on which this map is used

endian - the endian format. See <uvm_endianness_e> for possible

values

byte_addressing - specifies whether consecutive addresses refer are 1 byte

apart (TRUE) or ~n_bytes~ apart (FALSE). Default is TRUE:

APB = create_map(“APB”, 0, 1, UVM_LITTLE_ENDIAN, 1)

check_data_width(width: int) → int

set_default_map(_map: UVMRegMap) → None

Defines the default address map

Set the specified address map as the <default_map> for this block. The address map must be a map of this address block.

get_default_map() → UVMRegMap

set_parent(parent: UVMRegBlock)

add_block(blk: UVMRegBlock)

add_map(_map: UVMRegMap)

add_reg(rg: UVMReg)

add_vreg(vreg)

add_mem(mem: UVMMem)

lock_model()

Function: lock_model

Lock a model and build the address map.

Recursively lock an entire register model and build the address maps to enable the UVMRegMap.get_reg_by_offset() and UVMRegMap.get_mem_by_offset() methods.

Once locked, no further structural changes, such as adding registers or memories, can be made.

It is not possible to unlock a model.

is_locked()

get_full_name() → str

Objects possessing hierarchy, such as <uvm_components>, override the default implementation. Other objects might be associated with component hierarchy but are not themselves components. For example, <uvm_sequence #(REQ,RSP)> classes are typically associated with a <uvm_sequencer #(REQ,RSP)>. In this case, it is useful to override get_full_name to return the sequencer’s full name concatenated with the sequence’s name. This provides the sequence a full context, which is useful when debugging.

Returns

The full hierarchical name of this object. The default implementation is the same as <get_name>, as uvm_objects do not inherently possess hierarchy.

Return type

str

get_parent() → Optional[UVMRegBlock]

get_root_blocks(blks)

get_blocks(blks: List, hier=1) → None

get_maps(maps: List) → None

get_registers(regs: List, hier=1) → None

Get the registers

Get the registers instantiated in this block. If ~hier~ is TRUE, recursively includes the registers in the sub-blocks.

Note that registers may be located in different and/or multiple address maps. To get the registers in a specific address map, use the UVMRegMap.get_registers() method.

get_memories(mems: List, hier=1) → None

Function: get_memories

Get the memories

Get the memories instantiated in this block. If ~hier~ is TRUE, recursively includes the memories in the sub-blocks.

Note that memories may be located in different and/or multiple address maps. To get the memories in a specific address map, use the UVMRegMap.get_memories() method.

get_map_by_name(name) → Optional[UVMRegMap]

Function: get_map_by_name

Finds an address map with the specified simple name.

The name is the simple name of the address map, not a hierarchical name. relative to this block. If no map with that name is found in this block, the sub-blocks are searched for a map of that name and the first one to be found is returned.

If no address maps are found, returns ~None~.

get_reg_by_name(name: str) → Optional[UVMReg]

Function: get_reg_by_name

Finds a register with the specified simple name.

The name is the simple name of the register, not a hierarchical name. relative to this block. If no register with that name is found in this block, the sub-blocks are searched for a register of that name and the first one to be found is returned.

If no registers are found, returns ~None~.

build_coverage(models)

Function: build_coverage

Check if all of the specified coverage model must be built.

Check which of the specified coverage model must be built in this instance of the block abstraction class, as specified by calls to UVMReg.include_coverage().

Models are specified by adding the symbolic value of individual coverage model as defined in <uvm_coverage_model_e>. Returns the sum of all coverage models to be built in the block model.

add_coverage(models)

Function: add_coverage

Specify that additional coverage models are available.

Add the specified coverage model to the coverage models available in this class. Models are specified by adding the symbolic value of individual coverage model as defined in <uvm_coverage_model_e>.

This method shall be called only in the constructor of subsequently derived classes.

has_coverage(models)

Function: has_coverage

Check if block has coverage model(s)

Returns TRUE if the block abstraction class contains a coverage model for all of the models specified. Models are specified by adding the symbolic value of individual coverage model as defined in <uvm_coverage_model_e>.

set_coverage(is_on)

Function: set_coverage

Turns on coverage measurement.

Turns the collection of functional coverage measurements on or off for this block and all blocks, registers, fields and memories within it. The functional coverage measurement is turned on for every coverage model specified using <uvm_coverage_model_e> symbolic identifiers. Multiple functional coverage models can be specified by adding the functional coverage model identifiers. All other functional coverage models are turned off. Returns the sum of all functional coverage models whose measurements were previously on.

This method can only control the measurement of functional coverage models that are present in the various abstraction classes, then enabled during construction. See the UVMRegBlock.has_coverage() method to identify the available functional coverage models.

get_coverage(is_on=-1) → bool

sample(offset, is_read, _map)

sample_values()

XsampleX(addr, is_read, _map)

get_default_path()

reset(kind='HARD')

needs_update()

async update(status, path=3, parent=None, prior=-1, extension=None, fname='', lineno=0)

async mirror(status, check=0, path=3, parent=None, prior=-1, extension=None, fname='', lineno=0)

async write_reg_by_name(status, name, data, path=3, map=None, parent=None, prior=-1, extension=None, fname='', lineno=0)

get_backdoor(inherited=True)

add_hdl_path(path, kind='RTL')

has_hdl_path(kind='')

get_full_hdl_path(paths, kind='', separator='.')

set_default_hdl_path(kind: str)

get_default_hdl_path() → str

set_hdl_path_root(path, kind='RTL')

is_hdl_path_root(kind='')

Xinit_address_mapsX()