uvm_transaction¶
- class uvm.base.uvm_transaction.UVMTransaction(name='', initiator=None)[source]¶
Bases:
UVMObjectThe
UVMTransactionclass is the root base class for UVM transactions. Inheriting all the methods ofUVMObject,UVMTransactionadds a timing and recording interface.This class provides timestamp properties, notification events, and transaction recording support.
Use of this class as a base for user-defined transactions is deprecated. Its subtype,
uvm_sequence_item, shall be used as the base class for all user-defined transaction types.The intended use of this API is via a
uvm_driverto callaccept_tr,begin_tr, andend_trduring the course of sequence item execution. These methods in the component base class will call into the corresponding methods in this class to set the corresponding timestamps (accept_time,begin_time, andend_time), trigger the corresponding event (begin_eventandend_event, and, if enabled, record the transaction contents to a vendor-specific transaction database.Note that get_next_item/item_done when called on a
uvm_seq_item_pull_portwill automatically trigger thebegin_eventandend_eventvia calls tobegin_trandend_tr. While convenient, it is generally the responsibility of drivers to mark a transaction’s progress during execution. To allow the driver or layering sequence to control sequence item timestamps, events, and recording, you must callUVM_SEQ_ITEM_PULL_IMP.disable_auto_item_recordingat the beginning of the driver’srun_phasetask.Users may also use the transaction’s event pool,
events, to define custom events for the driver to trigger and the sequences to wait on. Any in-between events such as marking the beginning of the address and data phases of transaction execution could be implemented via theeventspool.In pipelined protocols, the driver may release a sequence (return from
finish_itemor it’suvm_domacro) before the item has been completed. If the driver uses thebegin_tr/end_trAPI inUVMComponent, the sequence can wait on the item’send_eventto block until the item was fully executed, as in the following example.task uvm_execute(item, ...) // can use the `uvm_do macros as well start_item(item) item.randomize() finish_item(item) item.self.end_event.wait_on() // get_response(rsp, item.get_transaction_id()); //if needed endtask
A simple two-stage pipeline driver that can execute address and data phases concurrently might be implemented as follows:
task run() // this driver supports a two-deep pipeline fork do_item() do_item() join endtask task do_item() forever begin mbus_item req lock.get() seq_item_port.get(req); // Completes the sequencer-driver handshake accept_tr(req) // request bus, wait for grant, etc. begin_tr(req) // execute address phase // allows next transaction to begin address phase lock.put() // execute data phase // (may trigger custom "data_phase" event here) end_tr(req) end endtask: do_item