uvm_root

class uvm.base.uvm_root.UVMRoot

Bases: uvm.base.uvm_component.UVMComponent

The UVMRoot class serves as the implicit top-level and phase controller for all UVM components. Users do not directly instantiate UVMRoot. The UVM automatically creates a single instance of UVMRoot that users can access via the global (uvm-scope) variable, uvm_top.

The uvm_top instance of ~uvm_root~ plays several key roles in the UVM.

Implicit top-level - The uvm_top serves as an implicit top-level component. Any component whose parent is specified as None becomes a child of uvm_top. Thus, all UVM components in simulation are descendants of uvm_top.

Phase control - uvm_top manages the phasing for all components.

Search - Use uvm_top to search for components based on their hierarchical name. See UVMRoot.find and UVMRoot.find_all.

Report configuration - Use uvm_top to globally configure report verbosity, log files, and actions. For example, uvm_top.set_report_verbosity_level_hier(UVM_FULL) would set full verbosity for all components in simulation.

Global reporter - Because uvm_top is globally accessible (in uvm scope), UVM’s reporting mechanism is accessible from anywhere outside ~uvm_component~, such as in modules and sequences. See uvm_report_error, uvm_report_warning, and other global methods.

The uvm_top instance checks during the end_of_elaboration phase if any errors have been generated so far. If errors are found a UVM_FATAL error is being generated as result so that the simulation will not continue to the start_of_simulation_phase.

Variables

raise_exception_on_die – Selects if an Exception is raised when UVMRoot.die is called.

raise_exception_on_die = True

m_relnotes_done = True

classmethod get() → uvm.base.uvm_root.UVMRoot

Static accessor for UVMRoot.

The static accessor is provided as a convenience wrapper around retrieving the root via the UVMCoreService.get_root method:

# Using the uvm coreservice:
cs = UVMCoreService.get()
r = cs.get_root()

# Not using the uvm coreservice:
r = UVMRoot.get()

Returns

Handle to the UVMRoot singleton.

Return type

UVMRoot

m_inst = <uvm.base.uvm_root.UVMRoot object>

m_called_get_common_domain = False

classmethod m_uvm_get_root()

internal function not to be used

get the initialized singleton instance of uvm_root

Returns:

get_type_name()

This function returns the type name of the object, which is typically the type identifier enclosed in quotes. It is used for various debugging functions in the library, and it is used by the factory for creating objects.

This function must be defined in every derived class.

A typical implementation is as follows:

Returns

Type name of the object.

Return type

str

final_phase(phase)

The UVMFinalPhase phase implementation method.

This method should never be called directly. :param phase:

classmethod get_dut()

Returns the current Design-under-Test (DUT), if dut= argument was specified for call to run_test.

get_uvm_testname() → str

Returns the test name specified with +UVM_TESTNAME=

async run_test(test_name='', dut=None)

Phases all components through all registered phases. If the optional test_name argument is provided, or if a command-line plusarg, +UVM_TESTNAME=TEST_NAME, is found, then the specified component is created just prior to phasing. The test may contain new verification components or the entire testbench, in which case the test and testbench can be chosen from the command line without forcing recompilation. If the global (package) variable, finish_on_completion, is set, then $finish is called after phasing completes.

Parameters

• test_name (str) – Name of the test to run.

• dut – Handle to the DUT.

async wait_all_phases_done()

die()

This method is called by the report server if a report reaches the maximum quit count or has a UVM_EXIT action associated with it, e.g., as with fatal errors.

Calls the UVMComponent.pre_abort() method on the entire UVMComponent hierarchy in a bottom-up fashion. It then calls UVMReportServer.report_summarize and terminates the simulation.

Raises

Exception –

running_test_msg(test_name, uvm_test_top)

m_uvm_timeout_overridable = 1

set_timeout(timeout, overridable=1)

Specifies the timeout for the simulation. Default is UVM_DEFAULT_TIMEOUT.

The timeout is simply the maximum absolute simulation time allowed before a FATAL occurs. If the timeout is set to 20ns, then the simulation must end before 20ns, or a FATAL timeout will occur.

This is provided so that the user can prevent the simulation from potentially consuming too many resources (Disk, Memory, CPU, etc) when the testbench is essentially hung.

find(comp_match)

Find components from the hierarchy.

Parameters

comp_match (str) – String to match.

Returns

First component matching the string.

Return type

UVMComponent

find_all(comp_match, comps: List[uvm.base.uvm_component.UVMComponent], comp=None)

Returns the component handle (find) or list of components handles (find_all) matching a given string. The string may contain the wildcards, * and ?. Strings beginning with ‘.’ are absolute path names. If the optional argument comp is provided, then search begins from that component down (default=all components).

Parameters

• comp_match (str) –

• comps (list) –

• comp (UVMComponent) –

print_topology(printer=None)

Print the verification environment’s component topology. The printer is a UVMPrinter object that controls the format of the topology printout; a None printer prints with the default output.

Parameters

printer (UVMPrinter) – Printer used for printing the topology

m_find_all_recurse(comp_match, comps: List[uvm.base.uvm_component.UVMComponent], comp=None)

PRIVATE members

extern function void m_find_all_recurse(string comp_match,

ref uvm_component comps[$], input uvm_component comp=None);

Parameters

• comp_match –

• comps –

• comp –

m_add_child(child: uvm.base.uvm_component.UVMComponent) → bool

Add child to the top levels array. :param child: :type child: UVMComponent

Returns

True if adding child succeeds, False otherwise.

Return type

bool

build_phase(phase: uvm.base.uvm_phase.UVMPhase) → None

UVMBuildPhase for UVMRoot class.

Parameters

phase (UVMPhase) – Phase object.

m_do_verbosity_settings() → None

extern local function void m_do_verbosity_settings()

m_do_timeout_settings() → None

extern local function void m_do_timeout_settings()

m_do_factory_settings() → None

extern local function void m_do_factory_settings()

m_process_inst_override(ovr) → None

extern local function void m_process_inst_override(string ovr) :param ovr:

m_process_type_override(ovr)

extern local function void m_process_type_override(string ovr)

Parameters

ovr –

m_do_config_settings()

Processes config value options set from cmdline:

+uvm_set_config_int= +uvm_set_config_string=

m_do_max_quit_settings()

m_do_dump_args()

extern local function void m_do_dump_args()

m_process_config(cfg, is_int)

extern local function void m_process_config(string cfg, bit is_int) :param cfg: :param is_int:

m_check_verbosity()

extern function void m_check_verbosity()

report_header(_file=0) → None

extern virtual function void report_header(UVM_FILE file = 0)

Parameters

_file –

phase_started(phase) → None

At end of elab phase we need to do tlm binding resolution.

Parameters

phase (UVMPhase) – Current phase for this callback.

m_children: Dict[str, ‘UVMComponent’]

m_children_by_handle: Dict[‘UVMComponent’, ‘UVMComponent’]

m_children_ordered: List[‘UVMComponent’]

event_pool: UVMEventPool

uvm.base.uvm_root.get_report_server() → uvm.base.uvm_report_server.UVMReportServer